1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Description of the Related Art
There is known a NAND flash memory in which a plurality of threshold voltages are provided in order to enable storage of multi-bit data in one memory cell transistor. For example, in the case of four-value data, four threshold voltages (Vth0, Vth1, Vth2, Vth3) are provided, and thereby these data are stored in association with threshold voltages of “11”, “10”, “00” and “01”.
At the time of memory cell data read, write verify and erase verify (hereinafter simply referred to as “read time”), a voltage that is applied to the gate of the memory cell is set at a voltage between two kinds of threshold values. For example, for the purpose of simple description, if consideration is given of the case in which there are only cells which are in the states of Vth0 and Vth1, the gate voltage VCG is set at a value of Vth0<VCG<Vth1. In the case where data read is executed from the memory cell with the threshold voltage Vth0 in this state, the memory cell is set in the ON state and a drain current flows. On the other hand, when data read is executed from the memory cell with the threshold voltage Vth1, the memory cell is set in the OFF state, and no drain current flows. By detecting such a drain current, memory cell data can be read out.
If the temperature varies, like ordinary transistors, the threshold value of the memory cell transistor varies accordingly. On the other hand, since the gate voltage at the time of read is, e.g. a power supply voltage or a voltage which is generated by dividing the power supply voltage, the voltage level does not vary even if there is a temperature variation. Thus, in order to correctly read out data even if there is a variation in threshold value due to the temperature variation, it is necessary to secure a sufficient potential difference (voltage margin) between the threshold values.
However, if the power supply voltage lowers or if four or more kinds of threshold voltages are provided in the memory cell in order to increase the amount of information per unit memory cell, there is a tendency that a sufficiently large voltage margin cannot be secured.
In order to secure a read voltage margin, it has been proposed that the voltage VCG, which is applied to the gate of the memory cell at the time of read, is provided with temperature dependency that is similar to the temperature dependency of the memory cell (see, e.g. Jpn. Pat. Appln. KOKAI Publication No. 2006-196078).
In recent years, however, if the degree of microfabrication of memory cells further progresses, there is such a problem that memory cell data cannot correctly be read out at high temperatures, and the number of defective bits increases. Even in the case where memory cell data in the “10” state with a low threshold value can correctly be read out, memory cell data in the “00” state or “01” state with a high threshold value, in particular, cannot correctly be read out at high temperatures. Consequently, if the memory cell data in the “00” state or “01” state with a high threshold value is to be read out, the number of defective bits increases.
It is thought that this occurs due to the conspicuous effect of a parasitic transistor of the memory cell. The memory cell causes a current flow, which depends on the voltage that is applied to the control electrode (control gate) in accordance with electrons which are retained in the floating electrode (floating gate).
If the degree of microfabrication progresses, the size of the memory cell becomes smaller, and the channel length at the end of the memory cell decreases. If the voltage of the control electrode is applied to the channel with the decreased length, a parasitic transistor, which causes leak current, occurs. It is considered that such a parasitic transistor becomes obvious with the progress of microfabrication of the process.
The parasitic transistor has such a feature that a more electric current is caused to flow as the voltage that is applied to the control electrode becomes higher. Hence, it becomes difficult to correctly read out memory cell data of, in particular, the memory cell in the “01” state with the highest threshold voltage, which greatly varies due to the temperature variation.